In the typical prior art application involving use of a general purpose digital computer, system timing is normally controlled by a master clock subsystem typically located in the input-output logic portion of the overall computing system. Generally, the master clock unit of the computer system is a source of fixed or constant timing.
It is proposed in accordance with the present invention to provide a method and apparatus for providing high speed real time control utilizing a real time clock (RTC) resident in the central processing unit of the system. As a result, this real time clock arrangement may be operated on directly by memory reference instructions, thus facilitating changes in the real time clock overflow interrupt interval and also permitting storage of the real time clock value in the computer memory. Moreover, the present invention permits the computer to operate at higher real time clock interrupt rates which are of particular importance for wideband data formatting applications.
In view of the above, one object of the present invention is to provide high speed real time control for a computer system using a real time clock resident in the central processor unit.
A further object of the present invention is to provide a computer real time clock system which responds to stored instructions from the computer memory, whereby the real time clock interrupt interval is modifiable automatically, as desired.